Design-Reuse

CCSDS AR4JA LDPC Encoder and Decoder FEC IP Core Available For Licensing and Implementation from Global IP Core

January 9, 2023 - Global IP Core Sales - The new CCSDS AR4JA LDPC Encoder and Decoder FEC IP Core is a configurable design that allows runtime configuration for decoding different code rates (i.e., ...
EDN

Low power LDPC decoder created using high level synthesis

HLS methodology allows the hardware design to be completed at a higher level of abstraction such as C/C++ algorithmic description. This provides significant time and cost savings, and paves the way ...
Design-Reuse

CCSDS 231.0-B-3 LDPC Encoder and Decoder IP Core from Creonic Now Available

Kaiserslautern, Germany, May 6, 2021 — Creonic GmbH, a leading IP core provider in the communications market, announced today the release of their new CCSDS 231.0-B-3 LDPC Encoder and Decoder IP cores ...
Phys.org

Training neural belief-propagation decoders for quantum error-correcting codes

Two researchers at Université de Sherbrooke, in Canada, have recently developed and trained neural belief-propagation (BP) decoders for quantum low-density parity-check (LDPC) codes. Their study, ...
Total Telecom

AccelerComm’s New Highly Optimised LDPC Decoder in Software for Intel’s FlexRAN Reference Software Will Increase 5G Throughput by up to 3X

AccelerComm, the company supercharging 5G with Optimisation and Latency Reduction IP, today announced they have developed a highly optimised LDPC software decoder in collaboration with Intel. The ...
New Electronics

AccelerComm develops LDPC Decoder for Intel’s FlexRAN

AccelerComm, the company specialising in optimisation and latency reduction IP, has announced they have developed a highly optimised LDPC software decoder in collaboration with Intel. The solution is ...
EDN

LDPC: Another Key Step Toward Shannon

For communication designers, especially those in the networking and wireless field, the Shannon limit can be seen as the Holy Grail. And, since being first defined in ...