SAN JOSE — A consortium of chip-equipment makers here today announced a major deal with Ace Semiconductor to help set up the world's first wafer-level packaging production line in China. Under the ...
CoPoS may enable larger chips, but CoWoS is still better.
TSMC is preparing to mass-produce panel-level packaging (PLP), a next-generation chip-packaging technology — setting up a ...
As integrated circuit designers bring more sophisticated chip functionality into smaller spaces, heterogeneous integration, including 3D stacking of devices, becomes an increasingly useful and ...
SAN FRANCISCO — The Semiconductor Equipment Consortium for Advanced Packaging (SECAP) here today announced that it will install a 300-mm wafer-level packaging line at Unitive Inc.'s subsidiary in ...
Samsung Electronics has stepped up its deployment in the fan-out (FO) wafer-level packaging segment with plans to set up related production lines in Japan, according to industry sources. Samsung has ...
Use left and right arrow keys to seek audio. Apple's next-generation iPhone 18 will feature the company's next-gen in-house A20 processor, which is reportedly shifting from InFO to WMCM (Wafer-Level ...