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Abstract: A 15-transistor (15T) SRAM cell-based fully-digital computing-in-memory (CIM) macro is proposed for artificial intelligence accelerations. The CIM macro not only supports simultaneous read + ...

Abstract: In low supply voltage ($\text{V}_{\mathrm {DD}}$ ), the wordline (WL) underdrive read assist and the negative bitline (NBL) write assist circuits are widely used for stable operation of SRAM ...